论文标题

基于Van der waals异质的陡峭晶体管的冷源范式

A cold-source paradigm for steep-slope transistors based on van der Waals heterojunctions

论文作者

Logoteta, Demetrio, Cao, Jiang, Pala, Marco, Dollfus, Philippe, Lee, Youseung, Iannaccone, Giuseppe

论文摘要

能够在低电源电压下运行的晶体管的可用性对于改善计算电路的关键性能指标至关重要,即每单位能量的操作数量。在本文中,我们提出了一种新的设备概念,以基于2D材料的异质界面,以提供节能,陡峭的晶体管。我们表明,通过将电子从分散型呈强度分散的一个,由于冷源效应和载流子的降低,可以获得下阈值的下阈值波动。通过在MOSFET体系结构中集成两种不同的单层材料来实现这种机制,结合了范德华的杂结型,将隧道野外晶体管(FET)的次热行为与MOSFET结构的鲁棒性结合在一起,以与性能降解因子(例如磁带,尾部,尾部,尾部和粗糙度)的鲁棒性。关于隧道FET的另一个优势是制造设备只需要N型或P型掺杂。为了展示设备概念并讨论潜在的物理和设计选择,我们通过Abinitio和Full-Quantum Transport模拟进行研究,可能实现了两种最近报道的2D材料。

The availability of transistors capable of operating at low supply voltage is essential to improve the key performance metric of computing circuits, i.e., the number of operations per unit energy. In this paper, we propose a new device concept for energy-efficient, steep-slope transistors based on heterojunctions of 2D materials. We show that by injecting electrons from an isolated and weakly dispersive band into a strongly dispersive one, subthermionic subthreshold swings can be obtained, as a result of a cold-source effect and of a reduced thermalization of carriers. This mechanism is implemented by integrating in a MOSFET architecture two different monolayer materials coupled through a van der Waals heterojunction, combining the subthermionic behavior of tunnel field-effect transistors (FETs) with the robustness of a MOSFET architecture against performance-degrading factors, such as traps, band tails and roughness. A further advantage with respect to tunnel FETs is that only an n-type or p-type doping is required to fabricate the device. In order to demonstrate the device concept and to discuss the underlying physics and the design options, we study through abinitio and full-quantum transport simulations a possible implementation that exploits two recently reported 2D materials.

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