论文标题
带有像素处理器阵列的全卷积神经网络的持续传感器二进制式卷积神经网络
On-Sensor Binarized Fully Convolutional Neural Network with A Pixel Processor Array
论文作者
论文摘要
这项工作提出了一种在像素处理器阵列（PPA）传感器上实施完全卷积神经网络（FCN）的方法，并演示了粗分割和对象定位任务。我们使用批处理，小组卷积和可学习的二进制阈值来设计和训练二进制重量的FCN，以用于二进制重量和激活，生产足够小的网络，以嵌入PPA的焦平面上，并具有有限的本地存储器资源，并使用平行的基本添加/减去/减去，仅移动/降低，移动和位置操作。我们演示了PPA设备上FCN的首次实现，并在像素级处理器中完全执行三个卷积层。我们使用此体系结构来证明使用SCAMP-5 PPA视觉芯片在280 fps处的对象分割和定位的推理生成热图。
This work presents a method to implement fully convolutional neural networks (FCNs) on Pixel Processor Array (PPA) sensors, and demonstrates coarse segmentation and object localisation tasks. We design and train binarized FCN for both binary weights and activations using batchnorm, group convolution, and learnable threshold for binarization, producing networks small enough to be embedded on the focal plane of the PPA, with limited local memory resources, and using parallel elementary add/subtract, shifting, and bit operations only. We demonstrate the first implementation of an FCN on a PPA device, performing three convolution layers entirely in the pixel-level processors. We use this architecture to demonstrate inference generating heat maps for object segmentation and localisation at over 280 FPS using the SCAMP-5 PPA vision chip.
