论文标题

通过数据库分析了解散装的局部处理中的内存

Understanding Bulk-Bitwise Processing In-Memory Through Database Analytics

论文作者

Perach, Ben, Ronen, Ronny, Kimelfeld, Benny, Kvatinsky, Shahar

论文摘要

内存(PIM)的散装 - 局部处理,其中大型的位于内存阵列本身并行执行的大型位操作是一种新兴的计算形式,具有减轻内存壁问题的潜力。本文通过构建PIMDB(一种基于记忆性的状态逻辑,利用和专注于内存的散装式操作,旨在加速现实生活中的工作负荷:关系数据库的分析处理。我们引入了一个主机处理器编程模型,以支持虚拟内存中的散装局部PIM,开发技术以有效执行内存过滤和聚合操作,并将应用程序数据设置为内存。为了了解散装的PIM,我们将其与同一主机系统上的同等内存数据库进行了比较。 We show that bulk-bitwise PIM substantially lowers the number of required memory read operations, thus accelerating TPC-H filter operations by 1.6$\times$--18$\times$ and full queries by 56$\times$--608$\times$, while reducing the energy consumption by 1.7$\times$--18.6$\times$ and 0.81$\times$--12$\times$ for these基准分别。我们的广泛评估使用GEM5全系统仿真环境。模拟还评估了细胞耐力,表明所需的耐力在RRAM设备现有耐力范围内。

Bulk-bitwise processing-in-memory (PIM), where large bitwise operations are performed in parallel by the memory array itself, is an emerging form of computation with the potential to mitigate the memory wall problem. This paper examines the capabilities of bulk-bitwise PIM by constructing PIMDB, a fully-digital system based on memristive stateful logic, utilizing and focusing on in-memory bulk-bitwise operations, designed to accelerate a real-life workload: analytical processing of relational databases. We introduce a host processor programming model to support bulk-bitwise PIM in virtual memory, develop techniques to efficiently perform in-memory filtering and aggregation operations, and adapt the application data set into the memory. To understand bulk-bitwise PIM, we compare it to an equivalent in-memory database on the same host system. We show that bulk-bitwise PIM substantially lowers the number of required memory read operations, thus accelerating TPC-H filter operations by 1.6$\times$--18$\times$ and full queries by 56$\times$--608$\times$, while reducing the energy consumption by 1.7$\times$--18.6$\times$ and 0.81$\times$--12$\times$ for these benchmarks, respectively. Our extensive evaluation uses the gem5 full-system simulation environment. The simulations also evaluate cell endurance, showing that the required endurance is within the range of existing endurance of RRAM devices.

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