学术文献库

Herein, we report the use of nanostructured crystalline Si as a thermoelectric material and its integration into thermoelectric harvesters. The proof-of-concept relies on the partial suppression of lattice thermal transport by introducing pores with dimensions scaling between the electron mean free path and the phonon mean free path. In other words, we artificially aimed at the electron crystal phonon glass tradeoff targeted for thermoelectric efficiency. The devices were fabricated using CMOS compatible processes and exhibited power generation from a few microWatts per cm^2 to a few milliWatts per cm^2 under temperature differences from a few K to 200 K across the thermopiles. These numbers demonstrate the capability to power autonomous devices with environmental or body heat using silicon chips with areas below cm^2. This paper also reports the possibility of using the developed demonstrators for integrated thermoelectric cooling.