论文标题
高性能ADAS SOC的多端口和共享的内存架构
A Many-ported and Shared Memory Architecture for High-Performance ADAS SoCs
论文作者
论文摘要
增加对计算技术的投资和硅技术的进步推动了高级驾驶员援助系统（ADAS）和相应的SOC开发的快速增长。 ADAS SOC代表由CPU，GPU和人工智能（AI）加速器组成的异质体系结构。为了确保其安全性和可靠性，它必须处理从多个冗余来源收集的大量原始数据，例如高清摄像机，雷达和激光镜头，才能正确识别对象并及时做出正确的决定。特定的内存体系结构对于实现上述目标至关重要。我们提出了共享的内存体系结构，该架构可以在ADAS应用程序本地的多个并行访问之间实现高数据吞吐量。它还在严格的实时QoS约束下提供了确定性的访问延迟，并适当隔离。制造和分析原型。结果验证了所提出的体系结构为读取和写入访问提供接近100 \％的吞吐量，这是许多访问具有全注射率的大师同时生成的访问。它还可以为域特定的有效载荷提供一致的QoS，同时启用设计的可扩展性和模块化。
Increasing investment in computing technologies and the advancements in silicon technology has fueled rapid growth in advanced driver assistance systems (ADAS) and corresponding SoC developments. An ADAS SoC represents a heterogeneous architecture that consists of CPUs, GPUs and artificial intelligence (AI) accelerators. In order to guarantee its safety and reliability, it must process massive amount of raw data collected from multiple redundant sources such as high-definition video cameras, Radars, and Lidars to recognize objects correctly and to make the right decisions promptly. A domain specific memory architecture is essential to achieve the above goals. We present a shared memory architecture that enables high data throughput among multiple parallel accesses native to the ADAS applications. It also provides deterministic access latency with proper isolation under the stringent real-time QoS constraints. A prototype is built and analyzed. The results validate that the proposed architecture provides close to 100\% throughput for both read and write accesses generated simultaneously by many accessing masters with full injection rate. It can also provide consistent QoS to the domain specific payloads while enabling the scalability and modularity of the design.
